1. Field of the Invention
The present invention is generally related to pulse width modulator systems, and more specifically, to a pulse width modulation system having improved means for suppressing erroneously-generated, noise-related pulses from the final pulse width modulated signal output by the modulator. Particular utility for the present invention is found in the area of electric motor drive switching control, and the present invention will be described in connection with this utility, although other utilities for the present invention are also contemplated, including other power supply and generation control applications.
2. Brief Description of Related Prior Art
Pulse width modulators are widely known and used in the art to control switching of motor drives. As shown in FIG. 1, a typical pulse width modulator 10 consists essentially of a comparator 12 which compares the magnitude of a time-varying control signal at one input 14 with that of a periodic excitation or reference signal at a second input 16, and generates at output 18 an output pulse, whose duty cycle is a function of the comparison, for controlling the state of a switch 20 for actuating a motor drive 22. Typically, the reference signal has a triangular waveform, since this makes the output signal duty cycle vary roughly linearly with the magnitude of the control signal amplitude. Also typically, the comparator 12 is adapted to produce an output pulse (i.e., high logic state) when the amplitude of the reference signal exceeds that of the control signal, although depending upon the logic of the switch, comparator, and/or the nature of the control and reference signals, the comparator may be adapted to generate output pulses when the opposite is true (i.e., to go into a high logic state when the amplitude of the control signals exceed that of the reference signals).
Unfortunately, the motor, wiring, power electronics, and electromechanical circuitry typically used in motor drive systems generate considerable electrical noise, which noise is often unintentionally (and unpredictably) injected into the control and/or reference signals of the pulse width modulator controlling the motor drive (e.g., due to close proximity of the pulse width modulator to the noise-producing circuits and devices, faulty system grounding, and/or inadequate shielding of the pulse width modulator from the noise-producing circuits and devices). Such injected noise can have deleterious effects on the performance of the motor drive system. For example, when the magnitudes of the control and reference signals are approximately equal, but not yet within the desired threshold for toggling of the comparator's output, injected noise into one or both of the control and reference signals can distort the actual difference between the control and reference signals. Given the chaotic and unpredictable nature of such injected noise, this can cause the comparator to unpredictably generate erroneous switching commands (i.e., commands to toggle switching of the motor drive when no such toggling is desired). This can cause the motor drive to repeatedly switch on and off in cycles of unpredictable duration. This can greatly decrease the efficiency of the motor drive, and in extreme cases, can damage the motor drive or switch.
Several conventional techniques exist to suppress generation of noise-related output pulses in pulse width modulator systems. One such conventional technique is shown in FIG. 2 and uses a resistor-based positive feedback system 24 to generate a noise-suppressing hysteresis in the modulator 30. By selecting appropriate values for the resistors 32, 34 of the loop 24, the hysteresis of the system 24 can be made larger than the largest expected amplitude of injected noise, thereby substantially negating the effects of injected noise on the system 30.
Unfortunately, however, this technique has several drawbacks. For example, in addition to suppressing the effects of injected noise of the system 30, the hysteresis generated by feedback loop 24 also has the effect of reducing the usable amplitude range of input control signals. Since, as stated above, the duty cycle of the output pulses usually varies substantially linearly with the amplitude of the control signals, this reduction of the usable amplitude range of the control signals results in a corresponding reduction in the duty cycle range of the output pulses. Disadvantageously, since the duty cycle of the output pulses effectively controls the speed of the motor drive, this phenomenon can result in a loss of controllable motor speed range roughly proportional to the reduction of the duty cycle range.
A further disadvantage of this technique results from the fact that the degree of noise suppression generated by feedback loop 24 is directly related to the values of the feedback resistors 32,34, which must be fixed at the time of construction of the pulse width modulator system 30. Thus, in order for the system 30 to function properly, the maximum noise amplitude expected to be generated by the motor drive system must be very accurately predicted, and the values of resistors 32,34 chosen accordingly. Unfortunately, however, it is often difficult (if not impossible) to make such predictions with the required accuracy.
Another prior art pulse width modulator system 50 with noise related signal suppression is illustrated in FIG. 3. In system 50, the control signals and saw-tooth reference signals are input to the comparator. An unclocked set-reset flip-flop 52 receives the output signals of the comparator via inverting reset line 54, and a clock signal (of period equal to that of a saw-tooth reference signal) via inverting set line 56. The output 58 of the flip-flop 52 and the clock signal are connected to the inputs 60, 62 of a two-input AND gate 64. The output signals propagating on output 70 of the AND gate are used to control the motor drive.
In operation, the flip-flop 52 sets to a high output state only when the clock signal is low and the comparator output is high, and resets to a low output state only when the clock signal is high and the comparator output is low. The comparator's output signals have no effect on the flip-flop at all other times. The output of the flip-flop is clocked using AND gate 64. In this way, erroneously generated transitions in the comparator's output state have little chance of affecting the output state of the flip-flop. Thus, circuit 50 suppresses noise-related switching signals from the final output signals transmitted to the motor drive via output 70.
Unfortunately, however, flip-flop 52 requires a finite amount of time to set and reset itself. This means that the reference and clock signals must include a "dead time" (during which the flip-flop may be set or reset) which must be made greater than or equal to the minimum switching time of the flip-flop. Given typical flip-flop switching times and modern motor drive switching speeds, it is not uncommon for the minimum required "dead time" to be at least several percent of the switching time. Disadvantageously, this reduces the maximum available duty cycle of the output pulses for controlling the motor drive by an amount equal to the dead time, which in turn, reduces the controllable speed range of the motor.
Prior art pulse width modulator systems are disclosed in e.g., U.S. Pat. No. 4,757,241 to Young, U.S. Pat. No. 4,987,361 to Ohms, U.S. Pat. No. 4,977,492 to Kirchberg, Jr. et al., U.S. Pat. No. 4,849,871 to Wallingford, U.S. Pat. No. 5,079,498 to Cleasby et al., U.S. Pat. No. 5,192,922 to Jordan, U.S. Pat. No. 5,287,051 to Konrad et al., U.S. Pat. No. 5,379,209 to Goff, and U.S. Pat. No. 5,379,321 to Girmay. The systems disclosed in these patent suffer from the aforesaid and/or other disadvantages and drawbacks of the prior art.